Simulating Designs

Advanced Design System provides controllers that you can add and configure to simulate, optimize, and test your designs.

A DSP design simulation requires a Data Flow Controller while an Analog/RF design simulation requires one or more of various controllers. You can either add and configure the appropriate controllers or you can insert a template (choose Insert > Template from a Schematic window) that contains the appropriate controllers.

To simulate a design...

  1. Click and place controller
  2. Double-click to edit parameters

     
  3. Click to simulate design



The status of the simulation is displayed in a message window.

Simulation Wizard

Advanced Design System also provides a step-by step interface for circuit simulation. The Smart Simulation Wizard can be used to:

To "smart" simulate a design...

  1. Choose Simulate > Smart Simulation Wizard
  2. Specify Circuit Configurations
  3. Specify Simulation Options
  4. Display Results

Signal Processing Simulation

ADS provides an integrated environment for the design and validation of RF/analog/DSP system designs to the implementation level using the ADS Ptolemy simulator. The ADS signal processing environment enables:

The systems designer can architect a communications system using behavioral models to validate a concept. The designer can then design and substitute lower levels of abstraction to verify the RF/mixed signal design down to the circuit level, and export the design to a variety of manufacturing tools. Available statistical design capability allow the user to make difficult trade-offs during the design process in order to optimize performance or manufacturing yield.

A large array of behavioral RF/analog/DSP models work with the ADS Ptolemy simulator to provide leading-edge simulation accuracy during the design process. The inclusion of propagation and matrix models, facilitate modeling of the complete wireless system. ADS communications library modules support the latest communications standards such as WLAN, 3GPP, and Edge. These libraries can be used at the front end of the design process when the system architecture is conceptualized, during the design and implementation process, or at the back end of the design process during the final verification.

Instrument links to Agilent Technologies test and measurement instrumentation products provide virtual prototyping verification for designs prior to final implementation or tape out. For example, a new RF/analog/DSP transmitter design modeled in the signal processing schematic can be verified by linking the output of the simulation with one of the Agilent ESG signal generator products. The resulting real world signal produced in a virtual environment will include all of the signal distortions, noise, and propagation effects modeled into the design. This signal can then be fed into an Agilent signal analysis component or real-world receiver circuit to provide virtual prototyping capability, and the ability to "tune" the design using real-world hardware and analysis.

ADS Ptolemy simulation is controlled using a Data Flow Simulation Controller, sources, and sinks placed on the design. There must be at least one source or sink that is controlling the simulation. Controlling sinks and sources keep the simulation running; non-controlling sinks and sources do not.

Sources

Sources are components with no inputs. Sources can read data from files, instruments, and data sets. When a source is controlling the simulation, it will keep the simulation running long enough to output all its data.

Sinks

Sinks are components with no outputs. When a sink controls the simulation, it will keep the simulation running long enough to satisfy its start and stop times. When a sink is not controlling the simulation, it will start collecting data at Start, then collect as much data as the simulation produces.

Components

There are two basic types of Ptolemy components "Timed" and "Numeric". Timed components have a notion of sampling rate, carrier frequency, and envelope. Numeric components process integers, matrixes, floats, fixed point numbers and model the DSP portions of a design.
For more information on...

Analog/RF Simulation and Convergence

Analog/RF simulation computes the response of a circuit to a particular stimulus by formulating a system of circuit equations and then solving them numerically. Each simulation technology accomplishes this analysis as follows.

DC Analysis

Transient Analysis

Harmonic Balance (HB)

Solving Nonlinear Algebraic Equations

Nonlinear algebraic equations are solved using the Newton-Raphson algorithm (Newton's method) as follows.

S-parameter Test Lab

An S-parameter test lab enables you to calculate the S-parameters of multiple N-port networks in a single simulation run.

An S-parameter test lab is a schematic that contains one S-parameter test lab component and one or more test benches. A test bench is a schematic that contains an N-port network and terminations for each port of the network. Its use is best illustrated in multiple stage circuit designs where viewing the inter-stage circuit behavior of all stages simultaneously is desired. In such situations the S-parameter test lab can be used to terminate each stage in the applicable input/output impedances of adjacent stages rather than in the standard 50 ohms.

RefNets can also be used in conjunction with the S-parameter test lab feature.

Design Sequencer

A Design Sequencer controller enables you to sequence multiple simulations in a single simulation run using a test bench that includes all the desired simulation controllers and the top-level design file.
Some typical applications for a Sequencer controller are as follows.

Differences Between S-parameter Test Labs and Sequencer
Sequencer Test Lab
DC, SP, AC, HB, Tran, ENV, Ptolemy SP only
Utilizes Test Bench Controllers Utilizes Test Lab Controller
Different temps per test bench possible One simulation temp for all
Opt/Stat/ParamSwp at top level  
RefNets supported  

RefNets

A RefNet (reference network) component enables the port impedance from another design file in the system (the referenced network) to be referenced as a terminating impedance for the current design file under test.

Two typical applications for RefNets are as follows.

The two RefNet components, RefNetTB and RefNetDesign, have the same functionality and are supported under DC, AC and S-parameter analysis, with two differences:

Common Circuit Simulation Methods

Backward Euler

Trapezoidal Rule

Backward Difference Formulas (Gear's methods)

Truncation Error

The error made by replacing the time derivatives with a discrete-time approximation. This error is difficult to estimate and depends on the type of circuits and the time steps.

Local Truncation Error (LTE)

The truncation error made on a single step

Global Truncation Error (GTE)

Convergence Criteria

Newton's iteration is converged if the approximate solution first satisfies the Residue criteria at the end of each Newton iteration and the Update criteria once the residue criteria are satisfied.

Residue Criterion

KCL satisfied to a given tolerance. This is enforced at each node and is important when impedance at a node is small.

Update Criteria

Difference between the last two iterations must be small. This is important when impedance at a node is large.

Using Continuation Methods

Use continuation methods to provide a sequence of initial guesses that are sufficiently close to the solution to assure Newton's method convergence.

As long as the solution changes continuously as a function of the continuation parameter and the steps are small enough, Newton's method will converge. Keep in mind though that the first two methods, Source and gmin stepping, will fail if the continuation path contains a limit point.

Source Stepping

Uses a fraction of the source voltages and currents applied to the circuit as the continuation parameter.

Gmin Stepping

Uses the continuation parameter to control the value of the gmin resistors.

Arc-length Continuation

Works best for complicated continuation paths and limit points using a continuation parameter that is a function of the arc-length parameter.

Preventing Convergence Problems

Convergence problems usually arise as a result of errors in circuit connectivity or unreasonable (out of range) model or component values. Some of the steps you can take are as follows.

Momentum Simulation, Optimization, and Visualization

Momentum includes simulation, optimization, and visualization tools for predicting the performance of multilayer high-frequency circuit boards, antennas, hybrids, multichip modules, and integrated circuits.

Momentum enables you to:

Instrument Connectivity

Connection Manager enables the sharing of signals, measurements, algorithms, and data between ADS simulations and Agilent instruments (signal generators and signal analyzers).

Using Connection Manager, you can:

Simulation Controllers

Add one or more simulation controllers to the design based upon the type of design to be simulated and the kinds of analyses desired.

Description Typical Use
Data Flow Simulation Controller 
Controls the flow of mixed numeric and timed signals for digital signal processing simulations using the ADS Ptolemy simulator.
All signal processing designs
DC Simulation Controller 
Fundamental to all RF/Analog simulations. It performs a topology check and an analysis of the DC operating point.
All RF/Analog designs
AC Simulation Controller
Obtains small-signal transfer parameters like voltage gain, current gain, and linear noise voltage and currents.
Filter
Amplifier
S-Parameter Simulation Controller
Provides linear S-parameter, linear noise parameters, transimpedance, and transadmittance. Can be used to achieve many goals of the AC simulator.
Filter
Oscillator
Amplifier
Harmonic Balance Simulation Controller
Uses nonlinear harmonic-balance techniques to find the steady-state solution in the frequency domain.
Mixer
Oscillator
Power Amplifier
Transceiver
Circuit Envelope Simulation Controller
Uses a combination of frequency- and time-domain analysis techniques to yield a fast and complete analysis of complex signals such as digitally modulated RF signals.
Mixer
Oscillator
Power Amplifier
Transceiver
Phase-locked Loop
LSSP Simulation Controller
Performs large-signal S-parameter analyses to represent nonlinear behavior. The accompanying P2D simulator can be used to speed up subsequent analyses.
Power Amplifier
XDB Simulation Controller
Seeks a user-defined gain-compression point at which an actual power curve deviates from an idealized linear power curve.
Power Amplifier
Mixer
Transient/Conv. Simulation Controller
Solves a nonlinear circuit entirely in the time domain using simplified models to account for the frequency-dependent behavior of distributed elements.
Mixer
Power Amplifier
Switching Circuits
RF Budget Controller
Determines the linear and nonlinear characteristics of an RF system made up of a cascade of two-port, two-pin linear or nonlinear components.
Mixer
Nonlinear
Amplifier

Optimization & Statistical Design Controllers

Optimization and statistical design controllers are used in conjunction with RF/Analog and signal processing simulation controllers to:

Description Used With
Nominal Optimization Controller
Used to compare computed and desired responses and modify parameter nominal values to bring the computed response closer to the desired optimization goals.
Goal Component (required) A Goal component is used in conjunction to specify the optimization goals.
Monte Carlo Controller
Uses the Monte Carlo method to simulate a design over a given number of trials in which the statistical variables have values that vary randomly about their nominal values with specified probability distribution functions.
Yield Specification Component (optional) A Yield Specification component is used in conjunction to specify the desired yields. Statistical Correlation Component (optional) A Statistical Correlation component is used to specify statistical correlation between statistical design variables.
Yield Analysis Controller
Uses the Monte Carlo method described above to determine the manufacturing yield. For each trial, the computed response is compared to the corresponding yield specification, and a pass/fail decision is made.
Yield Specification Component (required) A Yield Specification component is used in conjunction to specify the acceptable performance. Statistical Correlation Component (optional) A Statistical Correlation component is used to specify statistical correlation between statistical design variables.
Yield Optimization Controller
Used to analyze multiple yield analyses and adjust the nominal values to maximize the yield estimate of the statistical design variables.
Yield Specification Component (required) A Yield Specification component is used in conjunction to specify the acceptable performance.
Design of Experiments Controller
Used to sequentially and iteratively improve the statistical performance of a design by identifying variables that contribute significantly to performance variation and honing in on the target statistical response.
DOE Goal Component (required) A DOE Goal component is used in conjunction to specify the desired goals.
 

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