3GPP FDD Base Station Transmitter Test

3GPPFDD_BS_TX is the test bench for 3GPP FDD base station transmitter testing. The test bench provides a way for users to connect to an RF circuit device under test and determine its performance by activating various test bench measurements. This test bench provides signal measurements for RF envelope, power (including CCDF), occupied bandwidth, ACLR, code and peak code domain power, and EVM.

The signal and most of the measurements are designed according to the 3GPP Technical Specification TS 25.141 and TS 25.104. Versions supported are 2000-03, 2000-12, and 2002-03.

This 3GPP FDD signal model is compatible with Agilent E4438C ESG Vector Signal Generator, Option 400 (3GPP W-CDMA Firmware Option for the E4438C ESG Vector Signal Generator). Details regarding Agilent E4438C ESG are included at the website http://www.agilent.com/find/esg.

The DUT output signal can be sent to an Agilent ESG RF signal generator.

This test bench includes a DSP section, an RF modulator, RF output source resistance, RF DUT connection, RF receivers, and DSP measurement blocks, as illustrated in the following figure. The generated test signal is sent to the DUT.

Transmitter Wireless Test Bench Block Diagram

In the 3GPP downlink signal frame structure, one frame has a duration of 10 msec and consists of 15 slots; each slot contains 2560 chips; each chip is an RF signal symbol.

There is only one type of downlink dedicated physical channel, the downlink dedicated physical channel (downlink DPCH). Within one downlink DPCH, dedicated data generated at Layer 2 and above (i.e. the dedicated transport channel (DCH), is transmitted in time-multiplex with control information generated at Layer 1). Layer 1 control information consists of known pilot bits to support channel estimation for coherent detection, transmit power-control (TPC) commands, and an optional transport-format combination indicator (TFCI). The TFCI informs the receiver about the instantaneous transport format combination of the transport channels mapped to the simultaneously transmitted downlink DPCH radio frame.

The downlink DPCH can therefore be seen as a time multiplex of a downlink DPDCH (Data1 and Data2) and a downlink DPCCH (TPC, TFCI, and Pilot).

The frame and slot structure of the downlink DPCH is illustrated in the following figure. (The following tables provide more information about each field.)

3GPP FDD Downlink Frame and Slot Structure

Test Bench Basics

A template is provided for this test bench.

3GPPFDD Base Station Transmitter Test Bench

To access the template:

1. In an Analog/RF schematic window select Insert > Template.
2. In the Insert > Template dialog box, choose 3GPPFDD_BS_TX_test, click OK; click left to place the template in the schematic window.

An example design using this template is available; from the ADS Main window click File > Example Project > WCDMA3G_RF_Verification_prj > 3GPPFDD_BS_TX_test .dsn.

The basics for using the test bench are:

• Connect to an RF DUT that is suitable for this test bench.
• CE_TimeStep, FSource, SourcePower, and FMeasurement parameter default values are typically accepted; if not, set values based on your requirements.
• Activate/deactivate measurement(s) based on your requirements.
• Run the simulation and view Data Display page(s) for your measurement(s).

For details, refer to Test Bench Details.

Test Bench Details

The following sections provide details for setting up a test bench, setting measurement parameters for more control of the test bench, simulation measurement displays, and baseline performance.

Open and use the template:

1. In an Analog/RF schematic window select Insert > Template .
2. In the Insert > Template dialog box, choose 3GPPFDD_BS_TX_test, click OK; click left to place the template in the schematic window.

Test bench setup is detailed here.

1. Replace the DUT (Amplifier2 is provided with this template) with an RF DUT that is suitable for this test bench.
   For information regarding using certain types of DUTs, see Appendix A, RF DUT Limitations.
2. Set the Required Parameters

   Note Refer to 3GPPFDD_BS_TX for a complete list of parameters for this test bench.

   Generally, default values can be accepted; otherwise, values can be changed by the user as needed.

   • Set CE_TimeStep.
     Cosimulation occurs between the test bench (using Agilent ADS Ptolemy Data Flow simulation technology) and the DUT (using Circuit Envelope simulation technology). Each technology requires its own simulation time step with time-step coordination occurring in the interface between the technologies.
     CE_TimeStep defines the Circuit Envelope simulation time step to be used with this DUT. The CE_TimeStep must be set to a value equal to or a submultiple of (less than) WTB_TimeStep; otherwise, simulation will stop and an error message will be displayed.
     Note that WTB_TimeStep is not user-settable. Its value is derived from other test bench parameter values; with default settings WTB_TimeStep=approx. 32.6 nsec. The value is displayed in the Data Display pages as TimeStep.

     WTB_TimeStep = 1/(ChipRate × SamplesPerChip)

     where

     ChipRate is the non-settable value (3.84 MHz)
     SamplesPerChip is the number of waveform sampling points during pulse forming.

   • Set FSource, SourcePower, and FMeasurement.
     • FSource defines the RF frequency for the signal input to the RF DUT.
     • SourcePower defines the power level for FSource. SourcePower is defined as the average power during the non-idle time of the signal.
     • FMeasurement defines the RF frequency output from the DUT to be measured.
3. Activate/deactivate ( YES / NO ) test bench measurements ( refer to 3GPPFDD_BS_TX ). At least one measurement must be enabled.
4. More control of the test bench can be achieved by setting Basic Parameters, Signal Parameters, and parameters for each activated measurement. For details refer to Parameter Settings.
5. The RF modulator (shown in the block diagram in Transmitter Wireless Test Bench Block Diagram) uses FSource, SourcePower ( Required Parameters ), MirrorSourceSpectrum ( Basic Parameters), GainImbalance, PhaseImbalance, I OriginOffset, Q OriginOffset, and IQ Rotation ( Signal Parameters ).
   The RF output resistance uses SourceR, SourceTemp, and EnableSourceNoise ( Basic Parameters ). The RF output signal source has a 50-ohm (default) output resistance defined by SourceR.
   RF output (and input to the RF DUT) is at the frequency specified (FSource), with the specified source resistance (SourceR) and with power (SourcePower) delivered into a matched load of resistance SourceR. The RF signal has additive Gaussian noise power set by resistor temperature (SourceTemp) (when EnableSourceNoise=YES).
   Note that the Meas_in point of the test bench provides a resistive load to the RF DUT set by the MeasR value (50-ohm default) ( Basic Parameters ).
   The Meas signal contains linear and nonlinear signal distortions and time delays associated with the RF DUT input to output characteristics.
   The TX DSP block (shown in the block diagram in Transmitter Wireless Test Bench Block Diagram) uses other Signal Parameters.
6. More control of Circuit Envelope analysis can be achieved by setting Envelope controller parameters. These settings include Enable Fast Cosim, which may speed the RF DUT simulation more than 10×. Setting these simulation options is described in Setting Fast Cosimulation Parameters and Setting Circuit Envelope Analysis Parameters in the Wireless Test Bench Simulation documentation.
7. To send the RF DUT output signal to an Agilent ESG RF signal generator, set parameters on the Signal to ESG tab.
   For details, refer to Signal to ESG Parameters.
8. To run a simulation, choose Simulation > Run in the Analog Design Environment main window.
   For details, refer to R unning a Simulation in the Wireless Test Bench Simulation documentation.
9. Simulation results will appear in a Data Display window for each measurement. Simulation Measurement Displays describes results for each measurement.
   For details on Viewing Results refer to the Wireless Test Bench Simulation documentation.