HSUPA User Equipment Transmitter Test

Introduction
The HSUPA_RF_Verification_prj project shows how to build an application that can be used as a Wireless Test Bench (WTB) and includes a special Summary data display page.

There is only one schematic design, HSUPA_UE_TX_test.dsn, under the HSUPA_RF_Verification_prj. Currently, this design covers four basic 3GPP/HSUPA user equipment transmitter measurements. They are:

Maximum power measurements
Adjacent channel leakage power ratio (ACLR) measurements
Peak code domain error (PCDE) measurements
Error vector magnitude (EVM) measurements
The DUT output signal can be sent to an Agilent ESG RF signal generator.

Test Bench Basics

The test bench schematic is shown in HSUPA_UE_TX.dsn Schematic.

HSUPA_UE_TX.dsn Schematic

HSUPA_UE_TX_test.dsn provides these features:

WTB style
subnetwork model HSUPA_UE_TX including both signal source and measurements
various measurements
analog/RF design schematic
Envelope/WTB co-simulation
Agilent ESG RF signal generator connectivity

This design measures four user equipment transmitter characteristics (Maximum Power, ACLR, PCDE, and EVM). By turning on/off certain measurements, any combination of said four measurements can be completed in just one simulation.

Test Bench Details

HSUPA_UE_TX is used to generate an RF uplink signal and complete the measurements; the schematic for this subnetwork model is shown in HSUPA_UE_TX Schematic; parameters are listed in Parameter Table of HSUPA_UE_TX.

HSUPA_UE_TX Schematic

HSUPA_UE_TX
This section provides parameter information for Required Parameters , Basic Parameters , Signal Parameters , and parameters for the various measurements.

Description HSUPA user equipment TX test

Library
Class
Derived From

Parameters

Parameter Table of HSUPA_UE_TX
Name	Description	Default	Type	Unit	Range
Required Parameters
CE_TimeStep	Circuit envelope simulation time step	1/3.84 MHz/8	real	sec	(0:inf)
WTB_TimeStep	Set CE_TimeStep <= 1/3.84e6/SamplesPerChip. SamplesPerChip is in Signal Parameters tab/category.
FSource	Source carrier frequency	1950 MHz	real	Hz	(0:inf)
SourcePowerClass	Source power class: Class 3, Class 4	Class 3	enum
FMeasurement	Measurement carrier frequency	1950 MHz	real	Hz	(0:inf)
MeasurementInfo	Available Measurements Each measurement has parameters on its tab/category below.
PowerMeasurement	Enable power measurement?: NO, YES	YES	enum
ACLR_Measurement	Enable ACLR measurement?: NO, YES	NO	enum
PCDE_Measurement	Enable peak code domain error measurement?: NO, YES	NO	enum
EVM_Measurement	Enable EVM measurement?: NO, YES	NO	enum
Basic Parameters
SourceR	Source resistance	50 Ohm	real	Ohm	(0:inf)
SourceTemp	Source resistor temperature	-273.15	real	Celsius	[-273.15:inf)
EnableSourceNoise	Enable source thermal noise?: NO, YES	NO	enum
MeasR	Measurement resistance	50 Ohm	real	Ohm	[10:1.0e6]
MirrorSourceSpectrum	Mirror source spectrum about carrier?: NO, YES	NO	enum
MirrorMeasSpectrum	Mirror meas spectrum about carrier?: NO, YES	NO	enum
RF_MirrorFreq	Mirror source frequency for spectrum/envelope measurement?: NO, YES	NO	enum
MeasMirrorFreq	Mirror meas frequency for spectrum/envelope measurement?: NO, YES	NO	enum
DUT_DelayBound	DUT delay bound	10.0 usec	real	sec	[0:(400.0/3840000)]
TestBenchSeed	Random number generator seed	1234567	int		[0:inf)
Signal Parameters
GainImbalance	Gain imbalance, Q vs I	0.0	real	dB	(-inf:inf)
PhaseImbalance	Phase imbalance, Q vs I	0.0	real	deg	(-inf:inf)
I_OriginOffset	I origin offset (percent)	0.0	real		(-inf:inf)
Q_OriginOffset	Q origin offset (percent)	0.0	real		(-inf:inf)
IQ_Rotation	IQ rotation	0.0	real	deg	(-inf:inf)
SamplesPerChip	Samples per chip	8	int		[2:32]
RRC_FilterLength	RRC filter length (chips)	16	int		[2:128]
Power Measurement Parameters
PowerDisplayPages	Power measurement display pages: 3GPPFDD_UE_TX_Power Equations 3GPPFDD_UE_TX_Power Table 3GPPFDD_UE_TX_Power Figures
PowerStartSlot	Start slot	0	int		[0:inf)
PowerSlotsMeasured	Slots measured	5	int		[0:inf)
ACLR_Measurement Parameters
ACLR_DisplayPages	ACLR measurement display pages: 3GPPFDD_UE_TX_ACLR Equations 3GPPFDD_UE_TX_ACLR Table 3GPPFDD_UE_TX_ACLR Figures
ACLR_Start	Measurement start	0.0	real	sec	[0:inf)
ACLR_Stop	Measurement stop	(2560/3.84) usec	real	sec	(0:inf)
ACLR_Slots	Measurement slots	0	int		[0:100]
ACLR_SpecMeasResBW	Spectrum resolution bandwidth	0	real	Hz	[0:inf)
ACLR_SpecMeasWindow	Window type: ACLR_none, ACLR_Hamming 0.54, ACLR_Hanning 0.50, ACLR_Gaussian 0.75, ACLR_Kaiser 7.865, ACLR_8510 6.0, ACLR_Blackman, ACLR_Blackman-Harris	ACLR_none	enum
PCDE_Measurement Parameters
PCDE_DisplayPages	PCDE measurement display pages: 3GPPFDD_UE_TX_PCDE Equations 3GPPFDD_UE_TX_PCDE Table 3GPPFDD_UE_TX_PCDE Figures
PCDE_StartSlot	Start slot	0	int		[0:inf)
EVM_Measurement Parameters
EVM_DisplayPages	EVM measurement display pages: 3GPPFDD_UE_TX_EVM Equations 3GPPFDD_UE_TX_EVM Table
EVM_Start	Measurement start	0.0	real	sec	[0:inf)
EVM_SlotsMeasured	Slots to measure	1	int		[0:inf)
EVM_ExcludeTransition	select YES for predictable power changes: NO, YES	NO	enum
SignalToESG_Parameters
EnableESG	Enable signal to ESG?: NO, YES	NO	enum
ESG_Instrument	ESG instrument address	[GPIB0::19::INSTR][4790]	instrument
ESG_Start	Signal start	0.0	real	sec	[0:inf)
ESG_Stop	Signal stop	(2560/3.84) usec	real	sec	[(ESG_Start+60/3.84e6/S):(ESG_Start+32/3.84/S)]
ESG_Slots	Slots to ESG	15	int		[0:1000]
ESG_Power	ESG RF output power (dBm)	-20.0	real		(-inf:inf)
ESG_ClkRef	Waveform clock reference: Internal, External	Internal	enum
ESG_ExtClkRefFreq	External clock reference freq	10 MHz	real	Hz	(0:inf)
ESG_IQFilter	IQ filter: through, filter_2100kHz, filter_40MHz	through	enum
ESG_SampleClkRate	Sequencer sample clock rate	30.72 MHz	real	Hz	(0:inf)
ESG_Filename	ESG waveform storage filename	HSUPA_UL	string
ESG_AutoScaling	Activate auto scaling?: NO, YES	YES	enum
ESG_ArbOn	Select waveform and turn ArbOn after download?: NO, YES	YES	enum
ESG_RFPowOn	Turn RF ON after download?: NO, YES	YES	enum
ESG_EventMarkerType	Event marker type: Neither, Event1, Event2, Both	Event1	enum
ESG_MarkerLength	ESG marker length	10	int		[1:60]

Simulation Measurement Displays

After running the simulation, results are automatically displayed in data display pages. The measurement data display templates corresponding to the selected measurements will also appear in the data display window.
This test bench also provides a Results Summary data display template that will appear in the data display window similar to the example shown in User Equipment Transmitter Test Bench - Summary.

User Equipment Transmitter Test Bench - Summary

The summary display page gives a Passed / Failed overview of the test results. For a deactivated measurement, N/A will be displayed.
Detailed measurement results pages can be accessed using the data display window's Page menu or toolbar button.

Baseline Performance

Reference simulation time, measured on a Pentium III/866M 384M PC running ADS 2005A on Microsoft Windows 2000:

about 1.5 minutes for maximum output power measurement
about 2 minutes for ACLR measurement
about 2 minutes for PCDE measurement
about 2 minutes for EVM measurement

References

3GPP Technical Specification TS 25.101, "UE Radio transmission and Reception (FDD)," Version 6.11.0, Mar. 2006.