Connected Solutions Design Types

This chapter describes these types of CS designs that may be created in ADS:
RF Transmission Test Design
RF BER Test Design
MATLAB Based Test Design

Example designs are discussed in Example Design Templates.

RF Transmission Test Design

This design type is used to generate a modulated RF signal, stimulate RF hardware under test, and analyze the received RF signal from the RF hardware for its general transmission type measurements.

This design type is defined for use with:
Agilent E4438C Electronic Signal Generator (ESG) instrument
Agilent 896XX Vector Signal Analyzer (VSA) instrument

RF_Transmission_Test_Design_Parameter_Summary_summarizes_the_generic_RF_Transmission_Test_Design_parameters._For_details_on_each_parameter,_see_Design Generic Parameter Reference.

For example schematics of this design, see Example Design Templates.

RF Transmission Test Design Parameter Summary
Parameter Description Values Default Range Type Unit Symbol
[Instrument Setup]
InstrumentEnabled Enable Instrument Connectivity Off (deselected), On (selected) Off (deselected)   switch    
[ESG Setup]
ESG_Instrument ESG Instrument Address   [GPIB0::19::INSTR] [localhost][4790]   instrument    
ESG_MinOutputPower ESG Minimum Output Power Limit   2.5e-15 [2.5ε−15, ESGmaxP] float W ESGminP
ESG_MaxOutputPower ESG Maximum Output Power Limit   0.02 [ESGminP, 0.02] float W ESGmaxP
[Advanced ESG Setup]
ESG_ExportFilename Export Waveform Filename   Tx_waveform.wfm   string    
ESG_ClkRef Waveform Clock Reference Internal, External Internal   enum    
ESG_ExtClkRefFreq External Clock Reference Frequency   10 MHz (0,∞) float Hz  
ESG_IQFilter IQ Filter through, filter_2100kHz, filter_40MHz through   enum    
ESG_AutoScaling Activate Auto-Scaling No, Yes Yes   query    
ESG_ArbOn Select Waveform and Activate ESG ARB After Download No, Yes Yes   query    
ESG_RFPowOn Activate RF Power After Download No, Yes Yes   query    
ESG_EventMarkerType Event Marker Type Neither, Event1, Event2, Both Event1   enum    
ESG_MarkerLength Event Marker Length   10 [1,60] int    
[VSA Setup]
VSA_MinInputPower VSA Minimum Input Power Limit   3.2e-8 [3.2ε−8, VSAmaxP] float dB VSAminP
VSA_MaxInputPower VSA Maximum Input Power Limit   0.02 [VSAminP, 0.02] float dB VSAmaxP
[Advanced VSA Setup]
VSA_DisplayMode Activate VSA Display No, Yes No   query    
VSA_Trace VSA Data Trace VSA_A, VSA_B, VSA_C, VSA_D VSA_B   enum    
VSA_SetupFile VSA Setup Filename   $HPEESOF_DIR/ Tx_waveform.set   filename    
VSA_Title VSA Display Title   "Transmission Measurement"   filename    
[DUT Model Setup]
DUT_PreAmpGain DUT Pre-Amplifier Gain   0.0 † float dB PreG
DUT_PreAmpNoiseFigure DUT Pre-Amplifier Noise Figure   0.0 [0,∞ ) float dB  
DUT_Gain DUT Gain   0.0   float dB G
DUT_NoiseFigure DUT Noise Figure     [0,∞ ) float dB  
DUT_MirrorSpectrum Mirror DUT Output Spectrum No, Yes No   query    
DUT_PostAmpGain DUT Post-Amplifier Gain   0.0 †† float dB PostG
DUT_PostAmpNoiseFigure DUT Post-Amplifier Noise Figure   0.0 [0,∞ ) float dB  
[RF Modulator]
ModulatorFreq Modulator Carrier Frequency   2400.0 MHz (0,∞) float Hz  
MirrorModSpectrum Mirror Modulator Spectrum No, Yes No   query    
[RF Impairments]
RF_ImpairmentsEnabled Enable RF Impairments Off (deselected), On (selected) Off (deselected)   switch    
GainImbalance Gain Imbalance, Q vs. I   0 (−∞,∞) float dB  
PhaseImbalance Phase Imbalance, Q vs. I   0 (−∞,∞) float deg  
I_OriginOffset I Origin Offset (%)   0 (−∞,∞) float    
Q_OriginOffset Q Origin Offset (%)   0 (−∞,∞) float    
IQ_Rotation IQ Rotation   0 (−∞,∞) float deg  
[Multipath Fading]
MultipathFadingEnabled Enable Multipath Fading Off (deselected), On (selected) Off (deselected)   switch    
CommonFadingModelEnabled Enable Common Fading Model Off (deselected), On (selected) Off (deselected)   switch    
FadingAlgorithm Fading Algorithm Jakes, NoiseFilter NoiseFilter   enum    
FadingSeed Jakes Algorithm Random Seed   1234567 (−∞,∞) int    
FadingPathNumber Number of Multipaths   4 [1,150] int   PN
FadingPowerArray Path Average Relative Power Array in dB   0.0 −14 −18 −20 (−∞,∞) float array    
FadingDelayArray Path Delay Array in nsec (ordered with increasing delays)   0.0 56 106 185 [0,∞ ) float array    
FadingUserType First Path Fading Type Rayleigh, Ricean Ricean   enum    
FadingRiceanFactor Factor for Ricean Fading Type   10 [0,∞ ) int    
FadingJakesOscNum Number of Jakes Algorithm Oscillators   10 (PN,∞) int    
[RF Interferers]
RF_InterferersEnabled Enable RF Interferers Off (deselected), On (selected) Off (deselected)   switch   RFI
LocationRF_Interferers Location of RF Interferers After multipath fading, Before multipath fading After multipath fading   enum    
ModFreqOffset Modulated Interferer Frequency Offset   0 (−∞,∞) float Hz  
ModPower Modulated Interferer Power   0 [0,∞ ) float W ModP
CW_FreqOffset CW Interferer Frequency Offset   0 (−∞,∞) float Hz  
CW_Power CW Interferer Power   0 [0,∞ ) float W CWP
[Additive White Gaussian Noise (AWGN)]
AWGN_Enabled Enable AWGN Off (deselected), On (selected) Off (deselected)   switch    
AWGN_Type AWGN Specification Type Noise (dBm) at ESG output, Noise (dBm/Hz) at ESG output, Local Eb/No (dB) at ESG output, Noise (dBm) at DUT input, Noise (dBm/Hz) at DUT input, Local Eb/No (dB) at DUT input, System Eb/No (dB) Noise (dBm) at DUT input   enum    
AWGN_Value AWGN Specification Value   −80 (−∞,∞) float    
[Measurement Setup]
NumberSegments Number of Signal Segments Measured   3 [1, ∞) int   N
DUT_InputPowerStart DUT Input RF Start Power   0.0001 (0,∞) float W Pstart
DUT_InputPowerStep DUT Input Power Step in dB   10 (−∞,∞) float dB Pstep
DUT_InputPowerNumSteps DUT Input Number of Power Steps   1 [0,∞) int   NumP
[DUT Output Frequency]
DUT_OutFreqEnabled Enable DUT Output Frequency Override Off (deselected), On (selected) Off (deselected)   switch    
DUT_OutputFreq DUT Output Frequency   2400.0 MHz (0,∞ ) float Hz  
[Data Display Setup]
DDSFileName Data Display Filename (Leave Blank for Default Display)       filename    
DSFileName Dataset Filename (Leave Blank for Default Name)       filename    
SourceDisplayRefPoint Source Signal Display Reference Point RF DUT Input, ESG Output RF DUT Input   enum    
DUT_MeasDisplayRefPoint DUT Measurement Display Reference Point RF DUT output, VSA input RF DUT output   enum    
DisableSourceDataDisplay Disable Source Signal Data Display No, Yes No   query    
SpecResBW Spectrum Resolution Bandwidth   100 kHz [0,∞ ) float Hz  
SpecWindow Spectrum Window Type None, Hamming 0.54, Hanning 0.50, Gaussian 0.75, Kaiser 7.865, _8510 6.0, Blackman, Blackman-Harris Kaiser 7.865   enum    
SpecMirrorFreq Mirror Frequency of Source Spectrum/Envelope No, Yes No   query    
SpecMeasMirrorFreq Mirror Frequency of Measurement Spectrum/Envelope No, Yes No   query    
† DUT Pre-Amplifier Gain range; If RFI=0 then ModPx =0 else ModPx=ModP; if RFI=0 then CWPx=0 else CWPx=CWP: !consolwb-3-1-1.gif!
†† DUT Post-Amplifier Gain range: !consolwb-3-1-2.gif!

RF BER Test Design

This design type is used to generate a modulated RF signal, stimulate RF hardware under test, and analyze the received RF signal from the RF hardware for its BER performance.

This design type is defined for use with:

Agilent E4438C ESG instrument
and either
Agilent 896XX VSA instrument
or
Agilent 16900 Logic Analysis System and Agilent 896XX VSA software

The generic RF BER Test design has parameters that include all those listed in RF Transmission Test Design Parameter Summary (excluding DUT_MeasDisplayRefPoint , SpecMeasMirrorFreq , and the Multipath Fading parameter group) plus the additional VSA Digital IF Option subcategory of parameters listed in RF BER Test Design VSA Digital IP Option Parameter Summary. This subcategory of parameters is to be placed below the Advanced VSA Setup parameter group, and is for use in:

WiMax 802.16e Downlink BER Test Design
WiMax 802.16e Uplink BER Test Design

Also, include parameter SourceDisplaySegments :

See Design Generic Parameter Reference for details on each parameter.

For example schematics of this design, see Example Design Templates.

Category Description Values Default Range Type Unit Symbol
VSA_Digital_IF_OptionEnabled Enable VSA Digital IF Option "OFF, ON" OFF   switch    
VSA_Digital_IF_SetupFile VSA Digital IF Setup Filename   $HPEESOF_DIR/adsptolemy/templates/Reacquire_DigIF_BER_Meas.set   filename    
VSA_Digital_IF_NomSamplingRate VSA Digital IF Output Signal Nominal Sampling Rate   80 MHz [2*IF_Freq:inf) float FREQUENCY  
VSA_Digital_IF_CarrierFreq VSA Digital IF Output Signal IF Carrier Frequency   20 MHz   float FREQUENCY IF_Freq

MATLAB Based Test Design

This design type is used to generate a modulated RF signal from a MATLAB algorithm, stimulate RF hardware under test, and analyze the received RF signal from the RF hardware using MATLAB algorithms.

This design type is defined for use with:

Agilent E4438C Electronic Signal Generator (ESG) instrument
Agilent 896XX Vector Signal Analyzer (VSA) instrument

The generic RF MATLAB Based Test Design has the same parameters as those listed for the generic RF Transmission Test Design in RF_Transmission_Test_Design_Parameter_Summary._See_Design Generic Parameter Reference for details on each parameter.

For an example design of this design, see "MATLAB-Based Test Design Example".

 

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