2-Tone Nonlinear Simulations > Spectrum, Gain, TOI and 5thOI Points vs. Power (w/PAE)

Description

This simulation setup is identical to the HB2TonePswp schematic, except that it includes two current probes and named voltage nodes for calculating power-added efficiency. It also simulates the spectrum, output power, power gain, and intermodulation distortion of a device or amplifier all versus the available source power. A sample power amplifier is provided. You must replace this amplifier with your own device or amplifier, and modify the biases, as needed.

Needed to Use Schematic

A device or an amplifier using nonlinear model(s)

Main Schematic Settings

Center frequency of the two input tones, the frequency spacing between them, maximum order of the intermodulation terms to be computed, and swept values of the available source power (from both tones). The available source power sweep is divided into two parts, one coarse, and the other fine, for better resolution when the amplifier is being driven into compression. The source and load impedances at the fundamental and harmonic frequencies can also be set.

Data Display Outputs

All versus the available source power (in both tones):

Schematic Name

HB2TonePAE_Pswp

Data Display Name

HB2TonePAE_Pswp.dds

Notes
  1. When simulating a device, setting the source and load impedances at the fundamental and harmonic frequencies might be useful. However, when simulating an amplifier that already has source and load impedance matching networks, just leaving all these impedances at 50 ohms might be suitable.
  2. Only bias supplies on the highest level schematic will be included in the PAE calculation.For example, if you replace the sample amplifier with one with the bias supplies included in the subcircuit, those supplies will not be included in the PAE calculation. On the highest level schematic, you can delete one of the two supplies and/or replace the voltage sources with current sources, and the PAE calculation will still be valid. You can modify the components in the bias network, realizing that the DC power consumption is computed as (the DC voltage at the Vs_high node) * (the DC current in the Is_high current probe) + (the DC voltage at the Vs_low node) * (the DC current in the Is_low current probe).
 

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