DC and Bias Point Simulations > FET Fmax vs. Bias

Description

This simulates the maximum frequency of oscillation (the frequency at which the maximum available gain drops to 0 dB), versus bias voltage, for a particular value of VDS. It should help you determine how high in frequency a device can be used.

Needed to Use Schematic

Nonlinear FET model

Main Schematic Settings

VDS, gate voltage sweep limits, and frequency range for S-parameter simulation

Data Display Outputs

• The maximum available gain versus gate voltage and frequency
• dB(S21) versus gate voltage and frequency
• The maximum frequency of oscillation, which is dependent on a marker that you move to select the value of drain current

Schematic Name

FET_fmax_vs_bias

Data Display Name

FET_fmax_vs_bias.dds