DC and Bias Point Simulations > FET Noise Fig., S-Params, Gain, Stability, and Circles vs. Bias

Description

This simulates the S-parameters and noise parameters of a device, versus bias voltages, at a single frequency. You specify the gate and drain voltage sweep ranges, and the single frequency for S-parameter and noise analysis. The optimal source and load impedances for minimum noise figure and for maximum gain are computed, as well as the available gain circles, power gain circles, noise circles, and source and load stability circles.

Needed to Use Schematic

Nonlinear FET model

Main Schematic Settings

Sweep ranges for gate and drain voltages and frequency for S-parameter analysis

Data Display Outputs

FET_SP_NF_Match_Circ.dds, "NF, SP, Gains at all Bias Pts." page:

FET_SP_NF_Match_Circ.dds, "Matching at 1 Bias Point" page:

FET_SP_NF_Match_Circ.dds, "Circles_Ga_Gp_NF_Stability" page:
All at one bias point selected by moving a marker on the device's I-V curves:

Schematic Name

FET_SP_NF_Match_Circ

Data Display Name

FET_SP_NF_Match_Circ.dds

 

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