DC and Bias Point Simulations > FET Stability vs. Bias

Description

This simulates the S-parameters of a transistor, with the gate voltage swept and the drain bias voltage constant, to determine the stability factors as a function of gate voltage. It should help you determine the dependence of the stability factor on the bias point.

Needed to Use Schematic

Nonlinear FET model

Main Schematic Settings

VDS, gate voltage sweep limits, and frequency range for S-parameter simulation

Data Display Outputs

• Stability measure, B1, versus gate voltage and frequency
• Stability factor, K, versus gate voltage and frequency
• Geometrically-derived load stability factor, mu, versus gate voltage and frequency
• Geometrically-derived source stability factor, mu_prime, versus gate voltage and frequency

Schematic Name

FET_Stab_vs_bias

Data Display Name

FET_Stab_vs_bias.dds