Troubleshooting Netlist Translator for SPICE and Spectre

This chapter provides information on possible translation failures from the Netlist Translator and how to resolve issues that arise.

When an error occurs during a translation, an error message is written to the nettrans.log file. Sometimes, when potential problems are found or the translator makes a change that the user needs to be informed of, warning messages are also written to the nettrans.log file.

Debugging Imported Designs

Since no two design environments or simulators are alike, there may be problems that arise in the translation. Here are a few tips for debugging the translation.

1. Read the log files. The log files are ASCII text files that contain valuable translation information.
   • The nettrans.log file will always be present unless the translation completely failed. Running in a read-only directory might cause this problem. This file will list any components that could not be translated. Unrecognized syntax or incompatible models are the most likely causes of this problem.
   • The ifftolib.log file will be present if a schematic output was requested. This file lists problems encountered during creation of the schematic. For a summary of the import process, refer to Understanding the Import Operation.
2. Choose the netlist output option. Since the netlist to netlist translation gives you an output file that is human-readable, it is very easy to compare line by line with the source netlist. Even if you desire a schematic eventually, this method can be used to debug the translation. For information on netlist comparison, refer to Comparing the Netlist.
3. Output the netlist from ADS. First open the command line window from the ADS Main window.

   Choose Options > Command Line.

   Enter the command de_netlist();

   This will create a file called netlist.log in the project directory. This is the information that goes to the simulator.
   If you are using a NetlistInclude component, the #include statement will be visible. To flatten that and show the actual contents of the file, find the NetlistInclude component in the schematic and set its last parameter NetlistDebugMode=0. Regenerate the netlist from the ADS command line.

4. The translator can be run manually from the command line using the nettrans command. For detailed instructions on using the nettrans command, refer to Importing a File from the Command Line.
5. When debugging a very large file, the best thing to do is to break the file down into smaller pieces. Subcircuits and include files can be imported one at a time; however, you should import the lowest level of hierarchy first so the referenced design is created before it is used.
   If the imported design appears to be syntactically correct and contains the correct data, but simulation results are not as expected, please contact Agilent-EEsof-EDA customer support for the latest information on model compatibility.

Error Messages

Invalid subckt line < number >, < line text >.

The translator has encountered a subckt line with unrecognized syntax. Correct the problem and rerun the translator.

Failed opening netlist file < name >.

The file specified by < name > was not found, or could not be opened. Verify that the file exists, and then check file and directory permissions.

Failed opening output file < name >.

The file specified by < name > could not be opened for write. Check file and directory permissions. Make sure you are not running ADS from a read-only directory.

Failed opening logfile nettrans.log.

The file nettrans.log could not be opened. Verify that the file exists, and then check file and directory permissions.

Fatal error in position ports ( ). OR
Node < name > missing from memory.

These are errors internal to the translator. Have your system administrator contact Agilent Technologies technical support at eesof_support@agilent.com . In Canada and the United States, you can also call 1-800-473-3763. Elsewhere, contact your local Agilent Technologies sales office.

Recursive subckt reference found in network < name >.

A reference to subcircuit < name > was found in the subcircuit definition of the same name. A subcircuit cannot be placed within itself.

Failed memory allocation.

Not enough memory to complete the translation; the file is very large, or has many subcircuits. Separate the file into several smaller files and translate them individually. If needed, run the translation on a different machine

Found unmatched end of subckt at line <linenum>

An ends command was found but no subckt line corresponds to it. Correct the file and re-run the translation.

Invalid equation <eqn>

The translator failed parsing the equation while checking for reserved words or invalid characters. A complex equation may need to be broken down into simpler equations that reference each other if no obvious errors are visible.

Warning Messages

ADS Netlist Translator could not find a definition for < instance name >. A valid definition for < instance name > is required.

This warning is issued when the model/sub-circuit definition is not found. It might be that the definition is in the included file (if any).

Item mapping file < name > not found.

The item mapping file specified by < name > was not found, or could not be opened. Verify that the file exists, and then check the file and directory permissions.

Failed attempting to convert node voltage syntax for < varname >.
Variable reference not found.

For information on this warning message, refer to the comments under Capacitor Device or Resistor Device.

Failed opening include or library file < name >, line < number >.

The file specified by < name > was not found, or could not be opened. Verify that the file exists, and then check the file and directory permissions.

Failed processing line < number >, < text >.

Encountered syntax that cannot be translated. For more information on device, model and Command Line syntax, refer to Translating a Device, Translating a Model and Translating Commands and Functions.

Skipping unsupported capacitor syntax PWL, line < number >.

Optional PWL syntax # capacitor was encountered and cannot be translated. See capacitor description Capacitor Device.

Skipping unsupported inductor syntax PWL, line < number >.

Optional PWL syntax for inductor was encountered and cannot be translated. See inductor description Inductor Device.

Skipping unsupported source syntax < name >, line < number >.

Encountered source syntax that cannot be translated. See source descriptions Polynomial Voltage-Controlled Current Source (pvccs), and Linear Voltage-Controlled Voltage Source (vcvs).

Skipping unsupported < name > syntax, line < number >.

Encountered syntax for item < name > that cannot be translated. For more information on device, model and Command Line syntax, refer to Translating a Device, Translating a Model and Translating Commands and Functions.

Skipping unsupported 4-port JFET device < name >, line < number >.

Specified JFET is not available in ADS. See JFET description JFET Device.

Skipping unsupported model type < name >, line < number >.

Specified model is not available in ADS. See model descriptions Translating a Model.

Skipping unsupported statement < name >, line < number >.

Spectre < name > statement is unrecognized or unsupported. See control line descriptions Translating Commands and Functions.

Skipping unrecognized element type: line < number >, < name >.

Element type is not one of supported elements for the selected Spectre type. For information on supported devices, refer to Translating a Device.

Skipping unsupported element < name >.

Encountered element < name > that cannot be translated. For information on supported devices, refer to Translating a Device.

Invalid level < name > - skipping model < name >, line < number >.

Encountered unexpected level value for model < name >. See model descriptions in the Translating a Model.

Invalid library syntax - missing library name, line < number >.

See library syntax in the control lines section of library.

Model < mname > for device < name > in circuit < circuitname > not found.

Model referenced by device < name > is not found in the netlist. Check the names. Make sure the model is present globally or in the specified circuit. The model may exist or be added later in ADS but the translator will still generate a warning. If a model is not present in the file, the translator may not have enough information to place the proper device (ex: NPN vs. PNP). You may need to correct the schematic or netlist before simulating.

Referenced circuit < name > not found.

A circuit was used that has not been defined. Make sure the circuit is defined in the file or ADS.

Schematic not created for subcircuit <name> with no translated components.
A design will not be created if there is nothing to put in it. Look for a message regarding untranslated components.

Appended <?>_ to <item> due to a conflict with a reserved word.

A partial list of Advanced Design System reserved words is listed in Partial Listing of ADS Reserved Words. The full list is much longer. If the translator finds a node, element or variable name that is the same as a reserved word, the name is appended with an _n, _e or _v respectively.

Partial Listing of ADS Reserved Words

abs	db	e	ln	mag	nf	value
c0	deg	exp	ln10	max	step	y
cos	delay	i	log	min	v	z

For more information on ADS reserved words, refer to Reserved Names and Name Spaces.

Caution The subcircuit "ckt_name" contained parameters that reference each other. In order to maintain compatibility with ADS, these have been moved off the subcircuit parameters list and are treated as circuit equations. Component instances that reference this subcircuit will not be able to directly override these values.

The subcircuit ckt_name contains parameters that reference each other. The ADS netlist format does not support this syntax. Any subcircuit equations that reference each other are moved from the subcircuit parameter list and they are listed as subcircuit equations. Component instances that reference this subcircuit will no be able to directly override these values.

Known Problems

Problem ADS simulation results do not match my original simulation.
Model differences exist between all simulators due to different default parameters and different equations. ADS models are usually implemented exactly as specified in the Berkeley model. Differences that occur between ADS and other simulators are beyond our control since the equations for these simulators are not published.

Problem I have a very large netlist with a number of included files.
If your set of files seems too large to be handled in one translation, the included files can be imported first. Design files will be created for all subcircuits. Close all designs before doing the next import. If a referenced design has already been imported, you can ignore the warnings from the translator and ADS that say the referenced design cannot be found.

Problem Symbol and pin topology on subcircuits is hard-coded for schematic imports.

If a file contains references to a custom subcircuit, the pins will not be connected properly if the symbol is not the standard nport symbol supplied in the design environment. This is only a problem for importing to a schematic (wired or unwired). A work-around is available for the method that uses named connections (unwired). For more information on working around the unwired method, refer to Using the -u2 Option. For more information on using Named Connections , see Defining Netlist Options.

Problem Symbols in schematic overlap each other.

If symbol pins overlap, there can be problems with pins being left unconnected. This shows up as red diamonds on the pins in the schematic. For information on correcting this situation, refer to the following sections:

• Checking for Unconnected Nodes

• Using the -u2 Option.

• Modifying the Translator Configuration File.

Problem Statistical blocks of the form below, are not supported by the Netlist Translator prior to ADS 2005A. With the backward compatibility mode (-bc option), this block will be commented out.

statistics {
mismatch {
}
}

Problem Expressions of the form below are translated straight across and are not supported by ADS prior to 2005A:

| r=(p1 ? p2+1 : p3+1)

| c=(p1==p2)

Note Expressions of the form, c=(p1==p2), can be translated to run in ADS releases prior to 2005A by using the "-pp -bc" option. This is supported for Spectre only.

Problem Statistical parameters of the form %x are not translated to the ADS "stat" format.

Problem Numeric pin names of the subcircuit and component instances in the input netlist are prefixed with _node in the output netlist after the netlist translation.

Since _node is a reserved word for the un-named node in the ADS, you cannot connect this node to any other node using named connection(Wire/pin label).