RF Frequency Divider [FREQ_DIV]

This element is used to frequency divide input signals that exceed the input drive level threshold. This divider element internally includes both a frequency multiplier followed by a frequency divider. The will allow the maximum flexibility so the user can create a non-integer frequency multiplier and/or divider.  

All spectrum other than the single peak spectrum arriving at the input to this element will be treated as single sideband signals that will be decomposed into their AM and PM components which will get processed by this frequency translation device. See the 'SSB to AM PM Decomposition' section for additional information.

Models and Symbols





Alternate Models


Schematic Symbol


Alternate Schematic Symbols



Model Parameters




Default Value


Conversion Gain












Harmonics (f1;f2;...;fn)




Input Drive Level




Reverse Isolation




Output Noise Above Thermal




Scale Bandwidth (No: 0, Yes: 1)




Input Impedance




Output Impedance






* For Linear operation, only these variables are used. The resulting s-parameters are: S21 = CG dB, S12 = -RISO dB, NF = Noise - CG .

The frequency divider model internally is a frequency multiplier followed by a frequency divider.  The multiplier section operates just like frequency multiplier model (FREQ_MULT) followed by a frequency division.  The 'Multiplier Value' specifies the desired harmonic number (default for the divider = 1) where the 'Conversion Gain' is the difference in power between the input fundamental signal and the desired output harmonic level.  The 'Harmonic Level' table specifies the amplitude of the fundamental signal and each harmonic.  The harmonic levels are in dBc relative to the desired harmonic output level.  Consequently, there should be an entry in the table that contains 0 dBc for the desired harmonic level.  As expected the bandwidth of all harmonic signals at the output will be multiplied by the respective harmonic (i.e. the 5th harmonic will have 5 times the bandwidth as the input signal).  It is assumed that all entries in the harmonic level table have been measured in a bandwidth greater than or equal to the bandwidth of the harmonic.  The 'Input Drive Level' is the target input power for the multiplier.  This value is only used in the simulation to determine if the input power is out of range.  The 'Range Tolerance' can be specified in the system simulation dialog box.  Once all harmonics have been created as specified in the Harmonic Level Table they are followed by a frequency division as specified by the 'Divider Value'.

All harmonics created by the multiplier (excluding the fundamental) appear at the input of the multiplier through the reverse isolation.  These signals will then propagate backwards in a SPECTRASYS simulation.

The number of harmonics created by the multiplier is solely determined by the number of entries in the harmonic level table (i.e. if there are 10 entries then 10 harmonics will be created.  The maximum number of harmonics must be less than 100.

In SPECTRASYS the 'Channel Frequency' will be multiplied by the multiplier value only for the forward path.  No channel frequency translation will occur for reverse traveling signals.


All signals created by the frequency multiplier are assumed to be non-coherent with all other signals and will create a new coherency identification number.  The fundamental and reverse isolation signals are considered to be propagated and will maintain their coherency identification number from their parent.


Note: If the channel measurement bandwidth is narrower than the multiplied bandwidth the output power for that harmonic will appear to be lower than expected.  This is because SPECTRASYS is a channel based measurement tool.  All spectrum plots will be scaled by the channel bandwidth and most measurements only show power within the defined channel.  Remember to set the 'channel measurement bandwidth' to a bandwidth greater than or equal to the largest measured harmonic.


Note: The default 'Ignore Spectrum Frequency Above' limit defaults to 5 times the highest input frequency.  Please readjust this limit to include all of the desired harmonics of the multiplier.


FREQ_MULT 1 2 MULT =1 DIV=8 CG =-17 HL=0;20;23;15 InDrv=10 RISO=50 NOISE=23

This examples specifies a divide by 8 element with a 17 dB conversion loss.  The fundamental signal at the output will be 15 dB below the 2nd harmonic.  Likewise a 3rd and 4th harmonic will also be created that will be 23 dB and 15 dB respectively below the 2nd harmonic level.  The target input drive level is +10 dBm.  The noise floor output will be 23 dB above thermal noise which is equivalent to a noise figure of 40 dB (23 dB noise - ( -17) conversion gain).  If the system analysis range tolerance is 2 dB then a warning will appear if the total input drive level is less than +8 dBm or greater than +12 dBm.

If the input frequency is 1 GHz @ +10 dBm  then four frequencies and their power levels appearing at the output would be 125 MHz @ -7 dBm, 250 MHz @ -27 dBm, 375 MHz @ -30 dBm, and 500 MHz @ -22 dBm.

DC Block - DC is blocked.

WARNING: Only the linear portion of this model is used by simulators other than Spectrasys.